
Release notes for Armada-XP and Armada 370 LSP release 2012_Q4.1
================================================================
Table of Contents
-----------------

1.	Requirements
2.	Kernel pre-defined configurations (defconfig)
3.	Supported Features and Device Interfaces
4.	Unsupported Interfaces
5.	Supported Boards
6.	Changes List
7.	How to Build
8.	Known Issues

1. Requirements 
===============

	Stable vanilla kernel base: v3.2.34 (referred to as kernel)
	Supported SoCs:
		ArmadaXP A0/B0
		Armada370 A0/A1
	Required SDK: Marvell SDK 6.0-2012_Q4.0 (using Marvell GCC 4.6.2 - arm-marvell-linux-gnueabi-gcc-4.6.2)
	Tested with U-Boot:
	    ArmadaXP: 2012_Q4.p16 or higher
	    Armada370: 1.1.3 or higher.
	
	
2. Kernel pre-defined configurations (defconfig)
================================================

		ArmadaXP SoC:
			xp_v7smp:			==> SMP V7 mode with hardware cache coherency.
									Optimized for routing (no Network filter).
			xp_v7smp_nat:		==> SMP V7 mode with hardware cache coherency (with Network filter).
			xp_v7smp_nas:       ==> SMP V7 mode with hardware cache coherency.
									Optimized configuration for NAS platforms.
			xp_v7smp_lpae:		==> SMP V7 with LPAE 40bit support (B0 only).
			xp_v7smp_lpae_stat:	==> SMP V7 with LPAE 40bit support (B0 only) and network statistics.
			xp_v7smp_stat:		==> SMP V7 mode with hardware cache coherency and network statistics.
			xp_v7smp_be8:		==> SMP V7 BE8 mode with hardware cache coherency.
			xp_amp_g0/g1:		==> AMP V7 mode, images for Group 0 & Group 1 (see README for further info).
			
		Armada370 SoC:
			370_v7up:			==> UP V7 mode with hardware cache coherency
									Optimized for routing (no Network filter).
			370_v7up_nat:		==> UP V7 mode with hardware cache coherency (with Network filter).
			370_v7up_nas:		==> UP V7 mode with hardware cache coherency.
									Optimized configuration for NAS platforms.
			370_v7up_stat:		==> UP V7 mode with hardware cache coherency and network statistics.



3. Supported Features and Device Interfaces:
==========================================
- ARMv7 CPU Support (AXP and A370 only):
    - V7 SMP (UP for A370)
    - V7 architectural L2 cache
    - Floating Point Unit (VFPv3)
    - Thumb2 and ThumbEE instruction sets
- Giga ports using the HAL based driver
- SATA using the mainline LIBATA kernel driver
- USB Host interfaces
- UART interfaces
- SD/SDIO/MMC interface
- PCIe interfaces
- I/O cache coherency
- RTC
- I2C interface
- SPI flash
- NAND flash
- XOR DMA engines
- BE support
- Power Management (WFI, Idle, and Deep-Idle, CPU DFS)
- Support for Marvell Vanir SAS/SATA3 controllers (provided separately on demand)

AXP specific features:
- 2 OS groups AMP support
- LCD
A370 specific features:
- CESA
- TDM
4. Unsupported / UNTESTED Features:
===================================
- IDMA engines (All SoCs)
- TDM unit/telephony (AXP, A370)
- USB device support (All SoCs)
- AUDIO

5. Supported Boards:
====================
	ArmadaXP:
		1.	DB-78460-HE-BP Development Board for Armada-XP A0/B0 silicon
		2.	RD-78460-SERVER-REV2 Board for Armada-XP A0/B0 silicon
		3.	DB-784MP-GP General Purpose small form factor board for Armada-XP B0 silicon
	Armada370:
		1.	DB-88F6710-BP-DDR3 development board for Armada370 A0/A1 silicon
		2.	DB-88F6710-PCAC PC adaptor card
		3.	RD-A370 reference design board


6. Changes List
================

For changes in patches applied to this base LSP please refer to the PatchesReleaseNotes.txt file
provided with the patches.

Changes from LSP 2012_Q4.0
----------------------------
- Change the Internal Register base address from 0xD0000000 to 0xF1000000 except for AMP.
  In AMP configuration, the register base address is kept at 0xD0000000 as it is shared with other
  OS running.
- PM: Reorganization in the power management code
	- Kernel code handles most of the low level suspend/resume flows
	- proc-sheeva_pj4bv7.S and proc-sheeva_pj4bv7lpae.S files were updated
	- Fixed PM LPAE support
	- Fixed Armada370 PM support
	- Major PM code cleanup
	- Update CPU Hotplug support
- PM: S2RAM: Fix suspend to RAM
	- Fix S2RAM support with internal registers @ 0xF1000000
	- Update S2RAM support to the new low level PM flow
- BE: Fix bug in internal registers address switchingMode
- I2C: Revert repeated START between messages patch

Changes from LSP 5.1.1
----------------------
- SFLASH: Fixed support for SPI Flash M25Q128
- SATA: Added SATA AHCI support
- NETA: Fix TXQ TOS mapping
- UP: Fixed errata for cache clean in UP mode
- UP: Fixed data corruption bug in UP+IOCC mode
- PM: Fixed save TTBRC on suspend/resume and bug in cpuidle.c
- MISC: Rearrange IO address decode windows
    - Make PEX MEM windows smaller.
    - Remove unnecessary static mappings from sysmap.c
    - Reserve the last 256MB of the first 4GB of address space to IO.
- MISC: Move Internal Registers for LSP to 0xF1000000
- MISC: Remove hardcoded register definitions in headsmp.S
- MISC: Removed L2_PT_WALK changes for PJ4B V7
- MISC: A370: Fixed LED in front panel for RD_88F6710
- PM: Suspend to RAM: 
	- Added L2 flush in power-down routine
	- Enabled suspend to RAM with indirect interrupt mode
	- Added routines to save and restore the content of the DDR3 training memory space
	- Added suspend to RAM support for GP board
- PM: Added/Fixed suspend/resume support for: SDIO, sflash, PCIe, GPIO, XOR, USB, SMP
- PM: Fixed bug in LCD initialization routine Enabled LCD suspend to RAM
- PM: PCIe: Fix PM support in PCI Express.
- PM: A370: Resolved compilation errors
- NETA: Fix mvNetaPowerUp call during resume operation
- NETA: Fix Switch and Gateway mode support
- NETA: fix NAPI groups configuration in Kconfig
- QD-DSDT: update switch driver version to 3.0D
- AMP: Fixed bug on IPC network driver
- KERNEL: mutex: Place lock in contended state after fastpath_lock failure
- LPAE: LPAE Fixes:
	- set CP15 registers to the same value as non-LPAE
	- cpu_pj4bv7_set_pte_ext did not flush pte if not using 64KB page
	- march=armv6 is for AFLAGS_proc-sheeva_pj4bv6.o
	- add AFLAGS_proc-sheeva_pj4bv7lpae.o
- MISC: Fixed hwmon Kconfig to support A370 and AXP
- MISC: Updated defconfigs for A370 and AXP, added the XOR support
- MISC: Fixed compilation errors related to MV_INCLUDE_GIG_ETH and MV_INCLUDE_SPI
- MISC: A370: Fixed SPI, NAND and CESA functionalities
- NAS: A370: updating NAS defconfig 
- Updated main defconfig file - removed XOR support and Vanir driver
- Removed Vanir driver from LSP
- NAS: updating nas_init to version 3.4
- NAS: updating NAS defconfig (2g split, removing netdma for splice)
- NETA: Fix bug in tx_done timer invocation in SMP environment
- SDK 5.1.2 is also supported as it has the same toolchain as SDK 6.0

Changes from LSP 5.1.0
----------------------
- Added Armada370 support

Changes from LSP 5.0.2
----------------------
- PM: Suspend to RAM - Initial support - Disabled by default
- Kernel memcpy performance - reverts the memcpy acceleration code that was added for AXP Z1
- LPAE: Fix IO window config when using more than 4GB DRAM
- LPAE: ARM: 7488/1: mm: use 5 bits for swapfile type encoding
- LPAE: ARM: 7487/1: mm: avoid setting nG bit for user mappings that aren't present
- cpufreq support for ArmadaXP SoC - Disabled by default
- AMP: Modified the global register used for AMP synchronization
- NETA: Fix skb_recycle for kernel 3.2.27
- NETA: avoid build warning by adding include <linux/module.h>
- NETA: pppoe fixes for NFPv2
- NETA: Check CPU validity on TRC_OUTPUT function
- NETA: Fix sysfs command to read/write from PHY registers. All arguments for all commands in hex format
- NFP: add ppp_sync support for NFPv2

Changes from LSP 5.0.1
----------------------
- Fix bug in L2 replacement algorithm decoding
- PM: Deep idle - Fix and update for kernel 3.2.x
- NETA: Return arguments "port_mask" and "cpu_mask" to mvSysNetaInit() prototype

Changes from LSP 5.0.0
----------------------
- Updated defconfig files - added XOR support and Vanir driver
- Add CONFIG_IKCONFIG_PROC to defconfigs - allow reading the .config file from /proc/config.gz at runtime
- Fix DRAM windows for mainline drivers
- Disable window overlap testing
- Add some statistics for the mm bounce subsystem
- GP Board - Fix sata power GPIO
- LPAE: Fix mvOs APIs to use dma_addr_t instead of U32 variables for phys-addr
- LPAE: Fix address decoding init for mainline drivers

Changes from LSP 3.2.0
----------------------
- Added Armada-XP revision B0 support
- Added support for the RD-78460-SERVER-REV2 and DB-784MP-GP boards
- Added LPAE Initial support
- Updated hwmon threshold interrupt handling
- Updated the error handler
- AMP: Changed Global timer of second AMP image from 1 to co-exist with vxWorks
- NAS: Updated nas_init to v3.3
- SATA: Setting PHY speed according to SControl speed
- NETA: Fix settings RX filtering mode and Multicast addresses for kernel 3.2.22
- NETA: Fix power management support: 
	- Add support for WoL
	- Fix power management for down interfaces
- NETA: Add platform device as parent to our network device
- NETA: Fix possible bug in locking mechanism used for shared TXQs
- NETA: Fix bugs in TXQs usage in multi core environment
	- Fix TOS to TXQ mapping
	- Fix TX_DONE processing for TXQs shared between different CPUs
	
Changes from LSP 3.0.6
----------------------
- Align the 3.2.x kernel feature list to the 2.1.1 release (based on 3.0.x kernel).
- Enabling AMP.
- Enabling NAND flash.
- Enabling Perf.

7. How To build
===============

	- Download the vanilla <kernel> sources from kernel.org or using the GIT. Assume file is linux-<kernel>.tar.bz2.
	- Extract the vanilla kernel tarball (for example "tar -xjf linux-3.2.34.tar.bz2")
	- Rename the linux-<kernel> folder to linux-<kernel>-<rel> (for example linux-3.2.y-axp_a370-2012_Q4.1)
	- Extract the linux-<kernel>-<rel>.zip (for example "unzip linux-3.2.y-axp_a370-2012_Q4.1.zip"). This will 
	  override part of the kernel files and will add the extra added files.
	- At this point you will be asked if you want to replace a certain file, choose A for all files that have such a conflict. 	
	- Change directory 'cd' to the kernel directory.
	- Under the shell, issue the commands to set the environment (example for ARMv7 SoCs):
		'export ARCH=arm'
		'export CROSS_COMPILE=./your/path/to/the/toolchain/on/your/disk/arm-mv7-linux-gnueabi-'
	- Cleanup any old residuals
		'make mrproper'
	- Configure the kernel (example using AXP config):
		'make armada_xp_v7smp_defconfig'
	- Build the kernel
		'make uImage'	
    once the compilation is completed, The kernel uImage should be located under arch/arm/boot/ directory.

8. Known Issues
===============
- Memory region 3G to 4G is not utilized and reserved for system IO devices.
- CPU hotplug may fail with CPU IRQ affinity
- NETA: When BM is enabled, MTU change under traffic can cause instability. Jumbo packets may be dropped.
- MISC: MSI/MSI-X is not working when enabling the indirect (atomic) IRQ mode. It can also fail to init in SMP mode.
- Features that were not verified:
   - LCD Controller
   - 64K page table support
